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			<Name>31.00</Name>
			<SFW>02.07</SFW>
			<ILO>53.00.71</ILO>
			<FPGA>02.00</FPGA>
			<MON>03.04</MON>
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			<Name>30.00</Name>
			<SFW>02.06</SFW>
			<ILO>53.00.62</ILO>
			<FPGA>02.00</FPGA>
			<MON>03.04</MON>
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		<recipe>
			<Name>29.01</Name>
			<SFW>02.04</SFW>
			<ILO>53.00.51</ILO>
			<FPGA>02.00</FPGA>
			<MON>03.04</MON>
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		<recipe>
			<Name>29.00</Name>
			<SFW>02.03</SFW>
			<ILO>53.00.51</ILO>
			<FPGA>02.00</FPGA>
			<MON>03.04</MON>
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		<recipe>
			<Name>28.00</Name>
			<SFW>02.01</SFW>
			<ILO>53.00.42</ILO>
			<FPGA>02.00</FPGA>
			<MON>03.04</MON>
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		<recipe>
			<Name>27.00</Name>
			<SFW>02.00</SFW>
			<ILO>53.00.32</ILO>
			<FPGA>02.00</FPGA>
			<MON>03.04</MON>
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